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19-1389; Rev 1; 12/99
Low-Cost 4x4, 8x4, 8x8 Video Crosspoint Switches
General Description
The MAX4359/MAX4360/MAX4456 low-cost video crosspoint switches are designed to reduce component count, board space, design time, and system cost. Each contains a matrix of T-switches that connect any of their four (MAX4359) or eight (MAX4360/MAX4456) video inputs to any of their buffered outputs, in any combination. Each matrix output is buffered by an internal, high-speed (250V/s), unity-gain amplifier that is capable of driving 400 and 20pF at 2.6Vp-p. For applications requiring increased drive capability, buffer the MAX4359/ MAX4360/MAX4456 outputs with the MAX497 quad, gain-of-two video line driver. The MAX4456 has a digitally controlled 8x8 switch matrix and is a low-cost pin-for-pin compatible alternative to the popular MAX456. The MAX4359/MAX4360 are similar to the MAX4456, with the 8x8 switch matrix replaced by a 4x4 (MAX4359) or an 8x4 (MAX4360) switch matrix. Three-state output capability and internal, programmable active loads make it feasible to parallel multiple devices to form larger switch arrays. The inputs and outputs are on opposite sides, and a quiet power supply or digital input line separates each channel, which reduces crosstalk to -70dB at 5MHz. For applications demanding better DC specifications, see the MAX456 8x8 video crosspoint switch.
Features
o Eight (MAX4456) or Four (MAX4359/MAX4360) Internal Buffers 250V/s Slew Rate Three-State Output Capability Power-Saving Disable Feature 65MHz -3dB Bandwidth o Routes Any Input Channel to Any Output Channel o Serial or Parallel Digital Interface o Expandable for Larger Switch Matrices o 80dB All-Channel Off-Isolation at 5MHz o 70dB Single-Channel Crosstalk o Straight-Through Pinouts Simplify Layout o Low-Cost Pin-Compatible Alternative to MAX456 (MAX4456)
MAX4359/MAX4360/MAX4456
Ordering Information
PART MAX4359EAX MAX4359EWG MAX4360EAX MAX4456CPL MAX4456CQH MAX4456EPL MAX4456EQH TEMP. RANGE -40C to +85C -40C to +85C -40C to +85C 0C to +70C 0C to +70C -40C to +85C -40C to +85C PIN-PACKAGE 36 SSOP 24 SO 36 SSOP 40 Plastic DIP 44 PLCC 40 Plastic DIP 44 PLCC
________________________ Applications
High-Speed Signal Routing Video-On-Demand Systems
8 INPUT CHANNELS MAX497 AV = +2 WR LATCH Z0 = 75
Video Test Equipment Video Conferencing Security Systems
Pin Configurations appear at end of data sheet.
_________________________________________________ Typical Application Circuits
4 INPUT CHANNELS (8 INPUT CHANNELS) (MAX4360) MAX497 AV = +2 75 WR LATCH
75
75
Z0 = 75
MAX4456
A2 A1 A0 8x8 T-SWITCH MATRIX D3 D2 D1/SER OUT D0/SER IN AV = +2 MAX497
OUTPUT SELECT
MAX4359 (MAX4360)
OUTPUT SELECT A1 A0 4x4 (8x4) T-SWITCH MATRIX
75
INPUT SELECT OR SERIAL I/O
INPUT SELECT OR SERIAL I/O
D3 D2 D1/SER OUT D0/SER IN
________________________________________________________________ Maxim Integrated Products
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Low-Cost 4x4, 8x4, 8x8 Video Crosspoint Switches MAX4359/MAX4360/MAX4456
ABSOLUTE MAXIMUM RATINGS
Total Supply Voltage (V+ to V-) ...........................................+12V Positive Supply Voltage (V+) Referred to AGND .......-0.3V to +12V Negative Supply Voltage (V-) Referred to AGND ......-12V to +0.3V DGND to AGND ..................................................................0.3V Buffer Short Circuit to Ground when Not Exceeding Package Power Dissipation .............Indefinite Analog Input Voltage ............................(V+ + 0.3V) to (V- - 0.3V) Digital Input Voltage .............................(V+ + 0.3V) to (V- - 0.3V) Input Current, Power On or Off Digital Inputs.................................................................20mA Analog Inputs ...............................................................50mA Continuous Power Dissipation (TA = +70C) 36-Pin SSOP (derate 11.8mW/C above +70C) ...........941mW 24-Pin SO (derate 11.8mW/C above +70C)................941mW 40-Pin Plastic DIP (derate 11.3mW/C above +70C)....889mW 44-Pin PLCC (derate 13.3mW/C above +70C) .......1066mW Operating Temperature Ranges MAX4456C _ _ ....................................................0C to +70C MAX4_ _ _E_ _ .................................................-40C to +85C Junction Temperature ......................................................+150C Storage Temperature Range .............................-65C to +150C Lead Temperature (soldering, 10sec) .............................+300C
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
DC ELECTRICAL CHARACTERISTICS
(V+ = +5V, V- = -5V, VLOAD = +5V (internal load resistors on), VIN_ = VAGND = VDGND = 0, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25C.) PARAMETER Operating Supply Voltage Input Voltage Range Voltage Gain Buffer Offset Voltage Offset Voltage Drift MAX4359/MAX4360 Supply Current, All Buffers On (no external load) MAX4456 Supply Current, All Buffers Off Power-Supply Rejection Ratio Analog Input Current Output Leakage Current Internal Amplifier Load Resistor Buffer Output Voltage Swing Digital Input Current Output Impedance at DC Input Logic Low Threshold Input Logic High Threshold SER OUT Output Logic Low/High Serial mode, VSER/PAR = 5V IOL = 0.4mA IOH = -0.4mA 4 2.4 0.4 10 0.8 Internal load resistors off, all buffers off VLOAD = 5V TA = +25C TA = TMIN to TMAX 250 200 1.3 1 400 4.5V to 5.5V 50 TA = +25C TA = TMIN to TMAX TA = +25C TA = TMIN to TMAX 1.6 64 0.1 100 100 600 765 39 CONDITIONS Inferred from PSRR test Inferred from swing test Internal load resistors on, no external load, VIN = 0 to 1V TA = +25C TA = TMIN to TMAX 20 20 32 37 50 65 5 mA dB nA nA V A V V V mA TA = +25C TA = TMIN to TMAX MIN 4.5 -1.3 0.99 0.98 1.0 1.0 1 TYP MAX 5.5 1.3 1.01 1.02 15 20 UNITS V V V/V mV V/C
Internal load resistors on, no external load
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Low-Cost 4x4, 8x4, 8x8 Video Crosspoint Switches
AC ELECTRICAL CHARACTERISTICS
(V+ = +5V, V- = -5V, VLOAD = +5V (internal load resistors on), VAGND = VDGND = 0, TA = +25C, unless otherwise noted.) PARAMETER DYNAMIC SPECIFICATIONS X Output-Buffer Slew Rate Single-Channel Crosstalk All-Hostile Crosstalk All-Channel Off-Isolation -3dB Bandwidth Small-Signal -3dB Bandwidth 0.1dB Bandwidth Differential Phase Error Differential Gain Error Input Noise Input Capacitance Buffer Input Capacitance Output Capacitance Internal load resistors on, 10pF load 5MHz, VIN = 2Vp-p (Note 1) 5MHz, VIN = 2Vp-p (Notes 1, 2) 5MHz, VIN = 2Vp-p (Note 1) 10pF load, VIN = 2Vp-p (Note 1) 10pF load, VIN = 100mVp-p (Note 1) 10pF load, VIN = 100mVp-p (Note 1) (Note 3) (Note 3) DC to 40MHz All buffer inputs grounded Additional capacitance for each output buffer connected to channel input Output buffer off 250 70 57 80 35 65 4 1.0 0.5 0.3 6 2 7 V/s dB dB dB MHz MHz MHz degrees % mVRMS pF pF pF CONDITIONS MIN TYP MAX UNITS
MAX4359/MAX4360/MAX4456
SWITCHING CHARACTERISTICS
(Figure 4, V+ = +5V, V- = -5V, VLOAD = +5V (internal load resistors on), VIN_ = VAGND = VDGND = 0, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25C.) (Note 4) PARAMETER Chip-Enable to Write Setup Write Pulse Width High Write Pulse Width Low Data Setup Data Hold Latch Pulse Width Latch Delay Switch Break-Before-Make Delay LATCH Edge to Switch Off LATCH Edge to Switch On SYMBOL tCE tWH tWL tDS tDH tL tD tON - tOFF tOFF tON LATCH on Parallel mode Serial mode CONDITIONS MIN 0 80 80 240 160 0 80 80 15 35 50 TYP MAX UNITS ns ns ns ns ns ns ns ns ns ns
Note 1: See Dynamic Test Circuits section. Note 2: 3dB typical crosstalk improvement when RS = 0. Note 3: Input test signal: 3.58MHz sine wave of amplitude 40IRE superimposed on a linear ramp (0 to 100IRE). IRE is a unit of video-signal amplitude developed by the International Radio Engineers. 140IRE = 1.0V. Note 4: Guaranteed by design.
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Low-Cost 4x4, 8x4, 8x8 Video Crosspoint Switches MAX4359/MAX4360/MAX4456
Pin Description
PIN MAX4359 SO 1 2 3, 5 4, 6, 8, 10 SSOP 1 2 3, 5 4, 6, 8, 10 MAX4360 SSOP 1 2 3, 5 4, 6, 8, 10, 12, 14, 16, 18 MAX4456 DIP 1 2 3, 4, 6 PLCC 2 3 4, 5, 7 D1/ SER OUT D0/SER IN A_ IN_ Parallel Data Bit D1 when SER/PAR = GND. Serial output for cascading multiple parts when SER/PAR = VCC. Parallel Data Bit D0 when SER/PAR = GND. Serial input when SER/PAR = VCC. Output Buffer Address Lines Video Input Lines Asynchronous Control Line. When LOAD = VCC, all the 400 internal active loads are on. When LOAD = GND, external 400 loads must be used. The buffers must have a resistive load to maintain stability. Digital Ground. DGND pins must have the same potential and be bypassed to AGND. DGND should be within 0.3V of AGND. When this control line is high, the 2nd-rank registers are loaded with the rising edge of LATCH. If this control line is low, the 2nd-rank registers are transparent when LATCH is low, passing data directly from the 1st-rank registers to the decoders. No connection. Not internally connected. Connect to VCC for serial mode; connect to GND for parallel mode. Negative Supply. All V- pins must be connected to each other and bypassed to GND separately (Figure 2). In serial mode, WR (write) shifts data into the input register. In parallel mode, WR loads data into the 1st-rank registers. Data is latched on the rising edge. If EDGE/LEVEL = VCC, data is loaded from the 1strank registers to the 2nd-rank registers on the rising edge of LATCH. If EDGE/LEVEL = GND, data is loaded while LATCH = GND. In addition, data is loaded during the execution of parallel-mode functions 1011 through 1110, or if LATCH = VCC during the execution of the parallel-mode "software-latch" command (1111). NAME FUNCTION
5, 7, 9, 11, 6, 8, 10, 13, 13, 15, 17, 15, 17, 19, 19 21
7
7
7
8
9
LOAD
9
9
9
10, 12
11, 14
DGND
11
11
11
14
16
EDGE/ LEVEL
-- 12 13
12-16, 18, 22-26 17 19, 30
22-26 17 19, 30
-- 18 20, 34
1, 12, 23, 34 20 22, 38
N.C. SER/PAR V-
14
20
20
21
24
WR
15
21
21
22
25
LATCH
4
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Low-Cost 4x4, 8x4, 8x8 Video Crosspoint Switches
Pin Description (continued)
PIN MAX4359 SO -- SSOP -- MAX4360 SSOP -- MAX4456 DIP 23 PLCC 26 CE Active-Low Chip Enable. WR is enabled when CE = GND and CE = VCC. WR is disabled when CE = VCC and CE = GND. Active-High Chip Enable. WR is enabled when CE = GND and CE = VCC. WR is disabled when CE = VCC and CE = GND. Buffer Outputs. Buffer inputs are internally grounded with a 1000 or 1001 command from the D3-D0 lines. Analog Ground. AGND must be at 0.0V, since the gainsetting resistors of the buffers are connected to these pins. Parallel Data Bit when SER/PAR = GND. When D3 = GND, D0-D2 specify the input channel to be connected to specified buffer. When D3 = VCC, D0-D2 specify control codes. D3 is not used in serial mode (SER/PAR = VCC). Parallel Data Bit D2 when SER/PAR = GND. Not used when SER/PAR = VCC. Positive Supply. All V+ pins must be connected to each other and bypassed to AGND separately (Figure 2). NAME FUNCTION
MAX4359/MAX4360/MAX4456
16
27
27
24 25, 27, 29, 31, 33, 35, 37, 39 28, 30, 32
27 28, 30, 32, 35, 37, 39, 41, 43 31, 33, 36
CE
17, 19, 21, 23
28, 31, 33, 35
28, 31, 33, 35
OUT_
18
29
15, 29
AGND
20
32
32
36
40
D3
22 24
34 36
34 13, 36
38 16, 26, 40
42 18, 29, 44
D2 V+
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Low-Cost 4x4, 8x4, 8x8 Video Crosspoint Switches MAX4359/MAX4360/MAX4456
Detailed Description
Output Buffers
The MAX4456 video crosspoint switch consists of 64 T-switches in an 8x8 grid (Figure 1). The eight matrix outputs are followed by eight wideband buffers optimized for driving 400 and 20pF loads. The MAX4359's core is a 4x4 switch matrix with each of its outputs followed by a wideband buffer. The MAX4360 has an 8x4 matrix and four output buffers. Each buffer has an internal active load on the output that can be readily shut off through the LOAD input (off when LOAD = 0V). The shut-off is useful when two or more crosspoints are connected in parallel to create more input channels. With more input channels, only one set of buffers can be active and only one set of loads can be driven. When active, the buffer must have either 1) an internal load, 2) the internal load of another buffer in another MAX4359/MAX4360/MAX4456, or 3) an external load. Each output can be disabled under logic control. When a buffer is disabled, its output enters a high-impedance state. In multichip parallel applications, the disable function prevents inactive outputs from loading lines driven by other devices. Disabling the inactive buffers reduces power consumption. The outputs connect easily to MAX497 quad, gain-oftwo buffers when back-terminated 75 coaxial cable must be driven.
IN0
IN1
IN2
IN3
IN4
IN5
IN6
IN7
OUTPUT BUFFERS A = +1 OUT0
400
MAX4456 8x8 SWITCH MATRIX
LOAD
A = +1
OUT7
2nd-RANK REGISTERS
LATCH EDGE/LEVEL
400
SER/PAR
1st-RANK REGISTERS V+ A0 A1 A2 D0/SER IN D2 D1/SER OUT D3
WR CE CE V- AGND DGND
Figure 1. MAX4456 Functional Diagram 6 _______________________________________________________________________________________
Low-Cost 4x4, 8x4, 8x8 Video Crosspoint Switches
Power-On RESET
The MAX4359/MAX4360/MAX4456 have an internal power-on reset (POR) circuit that remains low for 5s after power is applied. POR also remains low if the total supply voltage is less than 4V. The POR disables all buffer outputs at power-up, but the switch matrix is not preset to any initial condition. The desired switch state should be programmed before the buffer outputs are enabled. through 0111 (D3-D0) for the MAX4360, and codes 0000 through 0011 (D3-D0) for the MAX4359. Note that the MAX4359 does not use codes 0100 through 0111. The eight codes 1000 through 1111 control other functions, as listed in Table 1.
MAX4359/MAX4360/MAX4456
7-Bit Parallel-Interface Mode (MAX4456)
In the MAX4456's parallel-interface mode (SER/PAR = GND), the seven data bits specify an output channel (A2, A1, A0) and the input channel to which it connects (D3-D0). This data is loaded on the rising edge of WR. The input channels are selected by codes 0000 through 0111 (D3-D0) for the MAX4456. The remaining eight codes 1000 through 1111 control other functions, as listed in Table 1.
Digital Interface
The desired switch state can be loaded in a parallelinterface mode or serial-interface mode (Table 3 and Figures 4, 5, 6). All action associated with the WR line occurs on its rising edge. The same is true for the LATCH line if EDGE/LEVEL is high. Otherwise, the second-rank registers update while LATCH is low (when EDGE/LEVEL is low). WR is logically ANDed with CE and CE (when present) to allow active-high or activelow chip enable.
16-Bit Serial-Interface Mode (MAX4359/MAX4360)
In serial mode (SER/PAR = VCC), all first-rank registers are loaded with data, making it unnecessary to specify an output address (A1, A0). The input data format is D3-D0, starting with OUT0 and ending with OUT3 for 16 total bits. For the MAX4360, only codes 0000 through 1010 are valid. For the MAX4359, only the codes 0000 through 0011 and codes 1000 through 1010 are valid. Code 1010 disables a buffer, while code 1001 enables it. After data is shifted into the 16bit first-rank register, it is transferred to the second rank by LATCH (Table 2), which updates the switches.
6-Bit Parallel-Interface Mode (MAX4359/MAX4360)
In the MAX4359/MAX4360's parallel-interface mode (SER/PAR = GND), the six data bits specify an output channel (A1, A0) and the input channel to which it connects (D3-D0). This data is loaded on the rising edge of WR. The input channels are selected by codes 0000
Table 1. Parallel-Interface Mode Functions
A2, A1, A0 D3-D0 0000 to 0111 1000 1011 1100 Selects Output Buffer 1101 1110 FUNCTION Connect the buffer selected by A2-A0 (MAX4456) or A1-A0 (MAX4359/MAX4360) to the input channel selected by D3-D0. Connect the buffer selected by A2-A0 (MAX4456) or A1-A0 (MAX4359/MAX4360) to DGND. Note, if the buffer output is on, its output is its offset voltage. Shut off the buffer selected by A2-A0 (MAX4456) or A1-A0 (MAX4359/MAX4360) and retain 2nd-rank registers contents. Turn on the buffer selected by A2-A0 (MAX4456) or A1-A0 (MAX4359/MAX4360, and restore the previously connected channel. Turn off all buffers, and leave 2nd-rank registers unchanged. Turn on all buffers, and restore the connected channels. Send a pulse to the 2nd-rank registers to load them with the contents of the 1st-rank registers. When latch is held high, this "software-LATCH" command performs the same function as pulsing LATCH low. Do not use these codes in the parallel-interface mode. These codes are for the serialinterface mode only. For the MAX4359, unused codes. 7
1111
1001 and 1010 0100 and 0111
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Low-Cost 4x4, 8x4, 8x8 Video Crosspoint Switches MAX4359/MAX4360/MAX4456
Table 2. Serial-Interface Mode Functions
D3-D0 FUNCTION Connect the selected buffer to the input channel selected by D3-D0. Note that 0100 through 0111 are not valid for the MAX4359. Connect the input of the selected buffer to GND. Note: If the buffer output remains on, its input is its offset voltage. Turn on the selected buffer and connect its input to GND. Use this code to turn on buffers after power is applied. The default power-up state is all buffers disabled. Shut off the selected buffer at the specified channel, and erase data stored in the 2nd rank of registers. The 2nd rank now holds the command word 1010. Do not use these codes in the serial-interface mode. They inhibit the latching of the 2nd-rank registers, which prevents proper data loading.
32-Bit Serial-Interface Mode (MAX4456)
In serial mode (SER/PAR = VCC), all first-rank registers are loaded with data, making it unnecessary to specify an output address (A2, A1, A0). The input data format is D3-D0, starting with OUT0 and ending with OUT7 for 32 total bits. Only codes 0000 through 1010 are valid. Code 1010 disables a buffer, while code 1001 enables it. After data is shifted into the 32-bit first-rank register, it is transferred to the second rank by LATCH (Table 2), which updates the switches.
0000 to 0111
1000
1001
1010
1011 to 1111
Table 3. Input/Output Line Configurations
SERIAL / PARALLEL H D3 D2 D1 Serial Output Parallel Input Parallel Input D0 (A2), A1, A0 X Output Buffer Address Output Buffer Address Serial Mode COMMENT
X
X
Serial Input
L
H
Parallel Input Parallel Input
Parallel Input Parallel Input
Parallel Mode, D0-D2 = Control Code Parallel Mode, D0-D2 = Input Address
L
L
X = Don't care, H = 5V, L = 0V ( ) are for MAX4456 only.
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Low-Cost 4x4, 8x4, 8x8 Video Crosspoint Switches MAX4359/MAX4360/MAX4456
MAX497
5 IN0 7 9 11 13 15 17 19 IN1 IN2 IN3 IN4 IN5 IN6 IN7 OUT0 39 37 35 33 31 29 27 25 24 14 8 40 26 28, 30, 32 10, 12 20 34 23 18 16 2 IN0 4 IN1 6 IN2 8 IN3 VCC 9,15 OUT0 16 AV = 2 OUT1 14 OUT2 12 OUT3 10 VEE GND 1, 3, 5, 7 11,13 -5V 75 Z0 = 75
8 INPUT VIDEO CHANNELS
14
18 19 20 21 22 23 24 25 DB-25
1 2 3 4 5 6 7 8
22 21
OUT1 OUT2 OUT3 OUT4 MAX4456 OUT5 OUT6 OUT7 CE EDGE/LEVEL LOAD LATCH V+ WR V+ AGND DGND VVCE SER/PAR V+
75
+5V
2 1 38 36 6 4 3
D0/SER IN D1/SER OUT D2 D3 A0 A1 A2
-5V
+5V
NOTE: ALL BYPASS CAPACITORS ARE 0.1F CERAMIC.
Figure 2. MAX4456 (plastic DIP) Typical Application Circuit
Typical Application
Figure 2 shows a typical application of the MAX4456 (PDIP) with MAX497 quad, gain-of-two buffers at the outputs to drive 75 loads. This application shows the MAX4456 digital-switch control interface set up in the 7bit parallel mode. The MAX4456 uses seven data lines and two control lines (WR and LATCH). Two additional lines may be needed to control CE and LOAD when using multiple MAX4456s. The input/output information is presented to the chip at A2, A1, A0, and D3-D0 by a parallel printer port. The data is stored in the 1st-rank registers on the rising edge of WR. When the LATCH line goes high, the switch configuration is loaded into the 2nd-rank registers, and all eight outputs enter the new configuration at the same time. Each 7-bit word updates only one output buffer at a time. If several buffers are to be updated, the data is individually loaded into the 1st-rank registers. Then, a single LATCH pulse is used to reconfigure all channels simultaneously.
The short BASIC program in Figure 3 loads programming data into the MAX4456 from any IBM PC or compatible. It uses the computer's "LPT1" output to interface to the circuit, then automatically finds the address for LPT1 and displays a table of valid input values to be used. The program does not keep track of previous commands, but it does display the last data sent to LPT1, which is written and latched with each transmission. A similar application is possible with the MAX4359/MAX4360.
Chip Information
MAX4359 TRANSISTOR COUNT: 2372 MAX4360 TRANSISTOR COUNT: 2372 MAX4456 TRANSISTOR COUNT: 3820
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Low-Cost 4x4, 8x4, 8x8 Video Crosspoint Switches MAX4359/MAX4360/MAX4456
Figure 3. BASIC Program for Loading Data into the MAX4456 from a PC Using Figure 2's Circuit
Timing Diagrams
A0-A2 VALID DATA N-1 D0-D3 tDS VALID DATA N
tDH
tWL WR tD tL tWH
LATCH
Figure 4. Write Timing for Serial- and Parallel-Interface Modes 10 ______________________________________________________________________________________
Low-Cost 4x4, 8x4, 8x8 Video Crosspoint Switches
Timing Diagrams (continued)
NOTE: SEE FIGURE 4 FOR WR AND LATCH TIMING. DATA (N) DATA (N + 1) DATA (N + 2)
MAX4359/MAX4360/MAX4456
WR LATCH
1st-RANK REGISTER DATA 2nd-RANK REGISTER DATA (EDGE/LEVEL = GND) 2nd-RANK REGISTER DATA (EDGE/LEVEL = VCC)
DATA (N)
DATA (N + 1)
DATA (N + 2)
DATA (N)
DATA (N + 1)
DATA (N)
DATA (N + 1)
Figure 5. Parallel-Interface Mode Format (SER/PAR = GND)
NOTES: SEE TABLE 2 FOR INPUT DATA. SEE FIGURE 4 FOR WR AND LATCH TIMING. INPUT DATA FOR OUT0 INPUT DATA FOR OUT1 TO OUT6 INPUT DATA FOR OUT7
0D3
0D2
0D1
0D0
1D3
1D2
7D3
7D2
7D1
7D0
WR
LATCH
2nd-RANK REGISTER DATA (EDGE/LEVEL = GND) 2nd-RANK REGISTER DATA (EDGE/LEVEL = VCC)
DATA VALID
DATA VALID
Figure 6. Serial-Mode Interface Format (SER/PAR = VCC)
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Low-Cost 4x4, 8x4, 8x8 Video Crosspoint Switches MAX4359/MAX4360/MAX4456
Dynamic Test Circuits
IN0 IN1 IN2
OUT0 OUT1 OUT2 VOUT
IN0 IN1 IN2
OUT0 OUT1 OUT2
VOUT VOUT VOUT VOUT VOUT VOUT VOUT VOUT +5V
IN3 MAX4456 OUT3 IN4 IN5 IN6 IN7 OUT4 OUT5 OUT6 OUT7 LOAD VIN = 2Vp-p, SWEEP FREQUENCY RS = 75 +5V
IN3 MAX4456 OUT3 IN4 IN5 IN6 IN7 OUT4 OUT5 OUT6 OUT7 LOAD VIN = 2Vp-p AT 5MHz RS = 75
-3dB BANDWIDTH (NOTES 1-4)
ALL-CHANNEL OFF-ISOLATION (NOTES 1, 5-8)
IN0 IN1 IN2 7 x 75
OUT0 OUT1 OUT2
VOUT VOUT VOUT VOUT VOUT VOUT VOUT 75
IN0 IN1 IN2
OUT0 OUT1 OUT2
VOUT
IN3 MAX4456 OUT3 IN4 IN5 IN6 IN7 OUT4 OUT5 OUT6 OUT7 LOAD VIN = 2Vp-p AT 5MHz RS = 75
IN3 MAX4456 OUT3 IN4 IN5 IN6 IN7 OUT4 OUT5 OUT6 OUT7 LOAD VIN = 2Vp-p AT 5MHz RS = 75 +5V
+5V
SINGLE-CHANNEL CROSSTALK (NOTES 1, 5, 9-11)
ALL-HOSTILE CROSSTALK (NOTES 1, 5, 9, 11, 12)
Connect LOAD to +5V (internal 400 loads on at all outputs). Program any one input to connect to any one output. See Table 1 or 2 for programming codes. Turn on the buffer at the selected output (Table 1 or 2). Drive the selected input with VIN, and measure VOUT at the -3dB frequency at the selected output. Program each numbered input to connect to the same numbered output (IN0 to OUT0, IN1 to OUT1, etc., for the MAX4456; also IN4 to OUT0, IN5 to OUT1, etc., for the MAX4360.) See Table 1 or 2 for programming codes. Note 6: Turn off all output buffers (Table 1 or 2). Note 7: Drive all inputs with VIN, and measure VOUT at any output. Note 8: Isolation (in dB) = 20log10 (VOUT/VIN). Note 9: Turn on all output buffers (Table 1 or 2). Note 10: Drive any one input with VIN, and measure VOUT at any undriven output. Note 11: Crosstalk (in dB) = 20log10 (VOUT/VIN). Note 12: Drive all but one input with VIN, and measure VOUT at the undriven output. Note 1: Note 2: Note 3: Note 4: Note 5:
12
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Low-Cost 4x4, 8x4, 8x8 Video Crosspoint Switches
Pin Configurations
TOP VIEW
D1/SER OUT 1 D0/SER IN 2 A1 3 IN0 4 A0 5 IN1 6 LOAD 7 IN2 8 DGND 9 IN3 10 EDGE/LEVEL 11 N.C. 12 N.C. 13 36 V+ 35 OUT0 34 D2 33 OUT1 32 D3
MAX4359/MAX4360/MAX4456
D1/SER OUT 1 D0/SER IN 2 A1 3 IN0 4 A0 5 IN1 6 LOAD 7 IN2 8 DGND 9 IN3 10 EDGE/LEVEL 11 SER/PAR 12
24 V+ 23 OUT0 22 D2 21 OUT1
D1/SER OUT 1 D0/SER IN 2 A1 3 IN0 4 A0 5 IN1 6 LOAD 7 IN2 8 DGND 9 IN3 10 EDGE/LEVEL 11 IN4 12 V+ 13 IN5 14 AGND 15 IN6 16 SER/PAR 17 IN7 18
36 V+ 35 OUT0 34 D2 33 OUT1 32 D3
MAX4359
20 D3 19 OUT2 18 AGND 17 OUT3 16 CE 15 LATCH 14 WR 13 V-
MAX4359
31 OUT2 30 V29 AGND 28 OUT3 27 CE 26 N.C. 25 N.C. 24 N.C. 23 N.C. 22 N.C. 21 LATCH 20 WR 19 V-
MAX4360
31 OUT2 30 V29 AGND 28 OUT3 27 CE 26 N.C. 25 N.C. 24 N.C. 23 N.C. 22 N.C. 21 LATCH 20 WR 19 V-
SO
N.C. 14 N.C. 15
D1/SER OUT 1 D0/SER IN 2 A2 3 A1 4 IN0 5 A0 6 IN1 7 LOAD 8 IN2 9 DGND 10 IN3 11 DGND 12 IN4 13 EDGE/LEVEL 14 IN5 15 V+ 16 IN6 17 SER/PAR 18 IN7 19 V- 20
40 V+ 39 OUT0 38 D2
N.C. 16 SER/PAR 17 N.C. 18
MAX4456
37 OUT1 36 D3 35 OUT2
SSOP
D1/SER OUT D0/SER IN
SSOP
OUT0
IN0
OUT1
N.C.
D2
34 V33 OUT3 32 AGND 31 OUT4 30 AGND 29 OUT5 28 AGND 27 OUT6 26 V+ 25 OUT7 24 CE 23 CE 22 LATCH 21 WR A0 IN1 LOAD
7 8 9
6
5
4
3
2
1
44 43 42
41 40
D3
A1
A2
V+
39 38 37 36
OUT2 VOUT3 AGND OUT4 N.C. AGND OUT5 AGND OUT6 V+
IN2 10 DGND 11 N.C. 12 IN3 13 DGND 14 IN4 15 EDGE/LEVEL 16 IN5 17
18 19 20 21 22 23 24 25 26 27 28
MAX4456
35 34 33 32 31 30 29
LATCH
SER/PAR
DIP
PLCC
______________________________________________________________________________________
OUT7
IN7
N.C.
CE
IN6
WR
CE
V+
V-
13
Low-Cost 4x4, 8x4, 8x8 Video Crosspoint Switches MAX4359/MAX4360/MAX4456
Package Information
SSOP.EPS
14
______________________________________________________________________________________
Low-Cost 4x4, 8x4, 8x8 Video Crosspoint Switches
Package Information (continued)
SOICW.EPS
MAX4359/MAX4360/MAX4456
______________________________________________________________________________________
15
Low-Cost 4x4, 8x4, 8x8 Video Crosspoint Switches MAX4359/MAX4360/MAX4456
Package Information (continued)
PLCC.EPS
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
16 ___________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 (c) 1999 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.
PDIPW.EPS

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